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Digital Electronics
Combinational Circuits
Other Circuits

Questions mapped to Other Circuits under Combinational Circuits.

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Q#1 Combinational Circuits GATE EE 2019 (Set 1) MCQ +2 marks -0.66 marks

The output expression for the Karnaugh map shown below is

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Q#2 Combinational Circuits GATE EE 2017 (Set 1) MCQ +2 marks -0.66 marks

The output expression for the Karnaugh map shown below is

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Q#3 Combinational Circuits GATE EE 2016 (Set 2) MCQ +1 mark -0.33 marks

The output expression for the Karnaugh map shown below is

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Q#4 Combinational Circuits GATE EE 2015 (Set 1) MCQ +2 marks -0.66 marks

(0,1,3,4,5,7,9,11,12,13,14,15) is a maxterm representation of a Boolean function f(A,B,C,D) where A is the MSB and D is the LSB. The equivalent minimized representation of this function is

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Q#5 Combinational Circuits GATE EE 2015 (Set 2) MCQ +1 mark -0.33 marks

Consider the following sum of products expression, F.

The equivalent product of sums expressions is

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Q#6 Combinational Circuits GATE EE 2014 (Set 1) MCQ +2 marks -0.66 marks

Which of the following logic circuits is a realization of the function F whose Karnaugh map is shown in figure

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Q#7 Combinational Circuits GATE EE 2014 (Set 2) MCQ +2 marks -0.66 marks

The SOP (sum off products) form of a Boolean function is , where inputs are A, B, C, D (A is MSB, and D is LSB). The equivalent minimized expression of the function is

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Q#8 Combinational Circuits GATE EE 2014 (Set 3) MCQ +1 mark -0.33 marks

A state diagram of a logic gate which exhibits a delay in the output is shown in the figure, where X is the don’t care condition, and Q is the output representing the state.

The logic gate represented by the gate diagram is

XOR

OR

AND

NAND

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Q#9 Combinational Circuits GATE EE 2012 (Set 1) MCQ +1 mark -0.33 marks

In the sum of products function, the prime implicant’s are

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Q#10 Combinational Circuits GATE EE 2012 (Set 1) MCQ +1 mark -0.33 marks

The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is

4

6

8

10

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Q#11 Combinational Circuits GATE EE 2010 (Set 1) MCQ +2 marks -0.66 marks

The following Karnaugh map represents a function F.

A minimized form of the function F is

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Q#12 Combinational Circuits GATE EE 2010 (Set 1) MCQ +2 marks -0.66 marks

The following Karnaugh map represents a function F.

Which of the following circuits is a realization of the above function F?

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Q#13 Combinational Circuits GATE EE 2007 (Set 1) MCQ +2 marks -0.66 marks

A, B, C and D are input bits, and Y is the output bit in the XOR gate circuit of the figure below. Which of the following statements about the sum S of A. B, C, D and Y is correct?

S is always either zero or odd

S is always either zero or even

S = 1 only if the sum of A, B, C and D is even

S= 1 only if the sum of A, B, C and D is odd

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Q#14 Combinational Circuits GATE EE 2004 (Set 1) MCQ +2 marks -0.66 marks

A digital circuit, which compares two numbers, is shown in figure. To get output Y = 0, choose one pair of correct input numbers.

1010, 1010

0101, 0101

0010, 0010

1010, 1011

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Q#15 Combinational Circuits GATE EE 2000 (Set 1) MCQ +2 marks -0.66 marks

The minimal product of sums function described by the K-map

A’C’

A’+C’

A+C

AC

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Q#16 Combinational Circuits GATE EE 1998 (Set 1) MCQ +2 marks -0.66 marks

In a digital combinational circuit with 4 inputs (A, B, C, D), it is required to obtain an output of logical 1 only for the input combination (A=1; B=C=D=0). It is known that the following combinations of input are forbidden:

ABCD= 1010, 1011, 1100, 1101, 1110, 1111

Evaluate the logical expression for the output and realize the same with two input NAND gates. Assume that complements of inputs are not available.

None

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Q#17 Combinational Circuits GATE EE 1991 (Set 1) MCQ +2 marks -0.66 marks

Complete the truth table for the combinational circuit shown in figure.

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