The bus impedance matrix of a 3-bus system (in pu) is

A symmetrical fault (through a fault impedance of  ) occurs at bus 2. Neglecting pre-fault loading conditions, the voltage at bus 1 , during the fault is __________ pu (round off to three decimal places).

For a power system and admittance and impedance matrices for the fault studies are a follows:

The pre fault voltages are 1.0 p.u at all the buses. The system was unloaded prior to the fault.  A solid 3 phase fault takes place at bus 2.                

The post fault voltages at buses 1 and 3 in per unit respectively are

For a power system and admittance and impedance matrices for the fault studies are a follows:

The pre fault voltages are 1.0 p.u at all the buses. The system was unloaded prior to the fault.  A solid 3 phase fault takes place at bus 2.               
The per unit fault feeds from generators connected to buses 1 and 2 respectively are

For the configuration shown in figure, the breaker connecting a large system to bus 2 is initially open. The system 3-phase fault level at bus-3 under this condition is not known. After closing the system breaker, the 3-phase fault level at bus 1 was found to be 5 p.u. What will be the new 3-phase fault level at system bus 3 after the interconnection? All unit values are on common bases. Per fault load current are neglected and pre fault voltages are assumed to be 1.0 p.u. at all buses.