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Digital Electronics
Microprocessor

Practice questions from Microprocessor.

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Q#1 Microprocessor GATE EE 2023 (Set 1) NAT +2 marks -0 marks

In a given 8-bit general purpose micro-controller there are following flags. C-Carry, A-Auxiliary Carry, O-Overflow flag, P-Parity (0 for even, 1 for odd)  and  are the two general purpose registers of the micro-controller. After execution of the following instructions, the decimal equivalent of the binary sequence of the flag pattern [CAOP] will be

MOV RO,

MOV R1, +0x46

ADD R0, R1

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Q#2 Microprocessor GATE EE 2020 (Set 1) NAT +2 marks -0 marks

An 8085 microprocessor accesses two memory locations (2001H) and (2002H), that contain 8-bit numbers 98H and B1H, respectively. The following program is executed:

LXI H,2001H

MVI A, 21H

INXH

ADD M

INXH

MOV M, A

HLT

At the end of this program, the memory location 2003H contains the number in decimal (base 10) form.         

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Q#3 Microprocessor GATE EE 2013 MCQ +2 marks -0.66 marks

An output device is interfaced with 8–bit microprocessor 8085A. The interfacing circuit is shown in figure

The interfacing circuit makes use of 3 Line to 8 Line decoder having 3 enable lines . The address of the device is

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Q#4 Microprocessor GATE EE 2013 MCQ +2 marks -0.66 marks

In an 8085 microprocessor, the following program is executed

Address location – Instruction

2000H              XRA A

2001H              MVI B, 04H

2003H              MVI A, 03H

2005H              RAR

2006H              DCR B

2007H              JNZ 2005

200AH              HLT

At the end of program, register A contains

60H

30H

06H

03H

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Q#5 Microprocessor GATE EE 2013 MCQ +1 mark -0.33 marks

In 8085A microprocessor, the operation performed by the instruction LHLD  is

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Q#6 Microprocessor GATE EE 2011 (Set 1) MCQ +2 marks -0.66 marks

A portion of the main program to call a subroutine SUB in an 8085 environment is given below.

                :

                :

              LXI        D, DISP
        LP. CALL        SUB
                :

                :

It is desired that control be returned to LP + DISP + 3 when the RET instruction is executed in thee subroutine. The set of instructions that precede the RET instruction in the subroutine are

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Q#7 Microprocessor GATE EE 2010 (Set 1) MCQ +2 marks -0.66 marks

When a “CALL” Addr” instruction is executed. The CPU carries out the following sequential operations internally:

Note:

(R) means content of register R

((R)) means content of memory location pointed to by R

PC means program counter

SP means stack pointer

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Q#8 Microprocessor GATE EE 2009 (Set 1) MCQ +2 marks -0.66 marks

In an 8085 microprocessor, the contents of the Accumulator, after the following instructions are executed will become

XRA A

MVI B F0H

SUB B

01 H

0F H

F0 H

10 H

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Q#9 Microprocessor GATE EE 2008 (Set 1) MCQ +1 mark -0.33 marks

An input device is interfaced with Intel 8085A microprocessor as memory mapped I/O.   The address of the device is 2500H. In order to input data from the device to accumulator, the sequence of instructions will be

LXI        H, 2500H

MOV        A, M

LXI        H, 2500H

MOV        M, A

LHLD        2500H

MOV        A, M

LHLD        2500H

MOV        M, A

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Q#10 Microprocessor GATE EE 2008 (Set 1) MCQ +2 marks -0.66 marks

The contents (in Hexadecimal) or some of the memory locations in an 8085A based system are given below:

The contents of stack pointer (SP), program counter (PC) and (HL) are 2700H, 2100H and 0000H respectively. When the following sequence of instructions are executed,

The contents of (SP) and (PC) at the end of execution will be

(PC) = 2102H, (SP) = 2700H

(PC) = 2700H, (SP) = 2700H

(PC) = 2800H, (SP) = 26FEH

(PC) = 2A02H, (SP) = 2702H

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Q#11 Microprocessor GATE EE 2007 (Set 1) MCQ +2 marks -0.66 marks

Which one of the following statements regarding the INT (interrupt) and the BRQ (bus request) pins in a CPU is true?

The BRQ pin is sampled after every instruction cycle, but the INT is sampled after every machine cycle.

Both INT and BRQ are sampled after every machine cycle

The INT pin is sampled after every instruction cycle, but the BRQ is sample dafter every machine cycle

Both INT and BRQ are sampled after every instruction cycle

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Q#12 Microprocessor GATE EE 2007 (Set 1) MCQ +2 marks -0.66 marks

The associated figure shows the two types of rotate right instructions R1, R2 available in a microprocessor where Reg is a 8-bit register and C is the carry bit. The rotate left instructions L1 and L2 are similar except that C now links the most significant bit of Reg instead of the least significant one.

Suppose Reg contains the 2's complement number 11010110. If this number is divided by 2 the answer should be

01101011

10010101

11101001

11101011

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Q#13 Microprocessor GATE EE 2007 (Set 1) MCQ +2 marks -0.66 marks

The associated figure shows the two types of rotate right instructions R1, R2 available in a microprocessor where Reg is a 8-bit register and C is the carry bit. The rotate left instructions L1 and L2 are similar except that C now links the most significant bit of Reg instead of the least significant one.

Such a division can be correctly performed by the following set of operations

L2, R2, R1

L2, R1, R2

R2, L1, R1

R1, L2, R2

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Q#14 Microprocessor GATE EE 2006 (Set 1) MCQ +2 marks -0.66 marks

A software delay subroutine is written as given below:        

How many times DCR L instruction will be executed?

255

510

65025

65279

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Q#15 Microprocessor GATE EE 2006 (Set 1) MCQ +2 marks -0.66 marks

In an 8085 microprocessor based system, it is desired to increment the contents of memory location whose address is available in (D, E) register pair and store the result in same location.  The sequence of instructions is

XCHG

INR M

XCHG

INX H

INX D

XCHG

INR M

XCHG

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Q#16 Microprocessor GATE EE 2005 (Set 1) MCQ +1 mark -0.33 marks

The 8085 assembly language instruction that stores the contents of H and L registers into the memory locations 2050H and 2051H, respectively, is:

SPHL 2050H

SPHL 2051H

SHLD 2050H

STAX 2050H

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Q#17 Microprocessor GATE EE 2004 (Set 1) MCQ +2 marks -0.66 marks

If the following program is executed in a microprocessor, the number of instruction cycles it will take from START TO HALT is

START        MVI A, 14 H        :  Move 14 H to register A

SHIFT        RLC                        : Rotate left without carry

                JNZ SHIFT                : Jump on non-zero to

                SHIFT

                HALT

4

8

13

16

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Q#18 Microprocessor GATE EE 2003 (Set 1) MCQ +1 mark -0.33 marks

When a program is being executed in an 8085 microprocessor, its Program Counter contains

The number of instructions in the current program that have already been executed

The total number of instructions in the program being executed

The memory address of the instruction that is being currently executed

The memory address of the instruction that is to be executed next

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Q#19 Microprocessor GATE EE 2003 (Set 1) MCQ +2 marks -0.66 marks

A memory system has a total of 8 memory chips, each with 12 address lines and 4 data lines. The total size of the memory system is

16 kbytes

32 kbytes

48 kbytes

64 kbytes

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Q#20 Microprocessor GATE EE 2003 (Set 1) MCQ +2 marks -0.66 marks

The following program is written for an 8085 microprocessor to add two bytes located at memory addresses 1FFE and 1FFF

LXI        H, 1FFE

MOV        B, M

INR        L

MOV        A, M

ADD        B

INR        L

MOV        M, A

XOR        A

On completion of the execution of the program, the result of addition is

In the register A

at the memory address 1000

at the memory address 1F00

at the memory address 2000

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Q#21 Microprocessor GATE EE 2002 (Set 1) MCQ +1 mark -0.33 marks

The logic circuit used to generate the active low chip selects (CS) by an 8085 microprocessor to address a peripheral is shown in Figure. The peripheral will respond to addresses in the range.

E000-EFFF

000E-FFFE

1000-FFFF

0001-FFF1

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Q#22 Microprocessor GATE EE 2001 (Set 1) MCQ +2 marks -0.66 marks

An intel 8085 processor is executing the program given below.

                          MVI A, 10H

                          MVI B, 10H

BACK:            NOP

                          ADD B

                          RLC

                          JNC BACK

                          HLT

The number of times that the operation NOP will be executed is equal to

1

2

3

4

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Q#23 Microprocessor GATE EE 2000 (Set 1) MCQ +1 mark -0.33 marks

Which one of the following is not a vectored interrupt?

TRAP

INTR

RST 7.5

RST3

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Q#24 Microprocessor GATE EE 1997 (Set 1) MCQ +1 mark -0.33 marks

In a microprocessor, the address of the next instruction to be executed, is stored in

Stack pointer

Address latch

Program counter

General purpose register

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Q#25 Microprocessor GATE EE 1997 (Set 1) MCQ +1 mark -0.33 marks

The computer program which converts statements written in high level language to object code is known as

Assembler

Operating system

Object-oriented software        

None of these

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Q#26 Microprocessor GATE EE 1997 (Set 1) MCQ +2 marks -0.66 marks

The range of address for which the memory chip shown in figure, will be selected is_________ to_________

(F8000) to  (FFFFH)

(F80FH) to  (FFFFH)

(F800H) to  (FFFFF)

(F800H) to  (FFFFH)

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Q#27 Microprocessor GATE EE 1996 (Set 1) MCQ +2 marks -0.66 marks

In a 8085 microprocessor, the following instructions may result in change of accumulator contents and change in status flags. Choose the correct match for each instruction.

(a)=> (T)

(b)=> (S)

(c) => (P)

(a)=> (T)

(b)=> (P)

(c) => (S)

(a)=> (P)

(b)=> (S)

(c) => (T)

None

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Q#28 Microprocessor GATE EE 1995 (Set 1) MCQ +1 mark -0.33 marks

In an 8085 microprocessor, after the execution of XRA A instruction  

The carry flag is set

The accumulator contains 

The zero flag is set

The accumulator contents are shifted left by one bit

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Q#29 Microprocessor GATE EE 1995 (Set 1) MCQ +2 marks -0 marks

A subroutine PROG1 written in the 8085 assembly language is given below. At entry to this program, the values of different registers in HEX are. A=05; BC=0000; DE=5472; HL=4528, All the flags are set to 1. Determine the register contents and condition of the zero and carry flags after the execution of the program. (i.e., after executing RET statement). What does the program accomplish?

PROG1        MOV A, E

        ADD L

        DAA

        MOV L, A

        MOV A, D

        ADC H

        DAA

        MOV H, A

        MVI A, 00H

        RAL

        RET

Contents of Registers,

HL = 0000H

BC = 0000H

DE = 5472H

A = 01H

CY = 0 and Z =1

Contents of Registers,

HL = 000H

BC = 0000H

DE = 5472H

A = 01H

CY = 1 and Z =0

Contents of Registers,

HL = 0000H

BC = 0000H

DE = 5472H

A = 10H

CY = 0 and Z =1

Contents of Registers,

HL = 0000H

BC = 0000H

DE = 5472H

A = 01H

CY = 1 and Z =1

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Q#30 Microprocessor GATE EE 1994 (Set 1) MCQ +1 mark -0.33 marks

The contents of the accumulator in an 8085 microprocessor is altered after the execution of the instruction.

CMP C

CPI 3A

ANI 5C

ORA A

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Q#31 Microprocessor GATE EE 1994 (Set 1) MCQ +1 mark -0.33 marks

The stack pointer of a microprocessor is at A001 At the end of execution of following instructions, the value of stack pointer is _____________

PUSH        PSW

X        THL        

PUSH        D

JMP         FC70 H

9FFF

9FFD

9FDD

9DFD

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Q#32 Microprocessor GATE EE 1993 (Set 1) MCQ +1 mark -0.33 marks

Three devices A, B and C have to be connected to a 8085 microprocessor. Device A has highest priority and device C has the lowest priority. In this context which of the following is correct assignment of interrupt inputs?

A uses TRAP, B uses RST 5.5 and C uses RST 6.5

A uses RST 7.5, B uses RST 6.5 and C uses RST 5.5

A uses RST 5.5, B uses RST 6.5 and C uses RST 7.5

A uses RST 5.5, B uses RST 6.5 and C uses TRAP

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Q#33 Microprocessor GATE EE 1992 (Set 1) MCQ +1 mark -0.33 marks

If the HLT instruction of a 8085 microprocessor is executed,

The microprocessor is disconnected from the system bus till the Reset is pressed

The microprocessor enters into a Halt state and the buses are tri-stated

The microprocessor halts execution of the program and returns to monitor

The microprocessor reloads the program from the locations 0024 and 0025 H

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