To obtain the Boolean function , the inputs  in the figure should be

The output expression for the Karnaugh map shown below is

The output expression for the Karnaugh map shown below is

Consider the following circuit which uses a 2-to-1 multiplexer as shown in the figure below. The Boolean expression for output F in terms of A and B is

The output expression for the Karnaugh map shown below is

In the 4 x 1 multiplexer, the output F is given by. Find the required input .

(0,1,3,4,5,7,9,11,12,13,14,15) is a maxterm representation of a Boolean function f(A,B,C,D) where A is the MSB and D is the LSB. The equivalent minimized representation of this function is

Consider the following sum of products expression, F.

The equivalent product of sums expressions is

A Boolean function  is to be implemented using an 8 x 1 multiplexer (A is MSB), The inputs ABC are connected to the select inputs  of the multiplexer respectively.

Which one of the following options gives the correct inputs to pins 0,1,2,3,4,5,6,7 in order?

Which of the following logic circuits is a realization of the function F whose Karnaugh map is shown in figure

The SOP (sum off products) form of a Boolean function is , where inputs are A, B, C, D (A is MSB, and D is LSB). The equivalent minimized expression of the function is

A state diagram of a logic gate which exhibits a delay in the output is shown in the figure, where X is the don’t care condition, and Q is the output representing the state.

The logic gate represented by the gate diagram is

In the sum of products function, the prime implicant’s are

The output Y of a 2-bit comparator is logic 1 whenever the 2-bit input A is greater than the 2-bit input B. The number of combinations for which the output is logic 1, is

The following Karnaugh map represents a function F.

A minimized form of the function F is

The following Karnaugh map represents a function F.

Which of the following circuits is a realization of the above function F?

A 3 line to 8 line decoder, with active low outputs, is used to implement a 3-variable Boolean function as shown in the figure.

The simplified form of Boolean function F(A, B, C) Implemented in 'Product of Sum' form will be

A, B, C and D are input bits, and Y is the output bit in the XOR gate circuit of the figure below. Which of the following statements about the sum S of A. B, C, D and Y is correct?

A 4 × 1 MUX is used to implement a 3-input Boolean function as shown in figure. The Boolean function F(A, B, C) implemented is

A digital circuit, which compares two numbers, is shown in figure. To get output Y = 0, choose one pair of correct input numbers.

Figure shows a 4 to 1 MUX to be used to implement the sum S of a 1-bit full adder with input bits P and Q and the carry input. Which of the following combinations of inputs to and  of the MUX will realize the sum S?

The output of the 4-to-1 MUX shown in figure is

The minimal product of sums function described by the K-map

The logic function  is to be realized using an 8 to 1 multiplexer shown in figure, using A, C and D as control inputs.

(a) Indicate the inputs to be applied at the terminals 0 to 7

(b) Can the function be realize using a 4 to 1 multiplexer? State YES or NO

Match the following

Logic        Function

(A)         (P) Sum

(B)         (Q) NAND

(C)         (R) Carry

        (S) NOR

In a digital combinational circuit with 4 inputs (A, B, C, D), it is required to obtain an output of logical 1 only for the input combination (A=1; B=C=D=0). It is known that the following combinations of input are forbidden:

ABCD= 1010, 1011, 1100, 1101, 1110, 1111

Evaluate the logical expression for the output and realize the same with two input NAND gates. Assume that complements of inputs are not available.

A 3-input 2-output priority encoder has the following truth table where X’s indicate don’t care conditions. Realize the logic using NAND gates and inverters

Complete the truth table for the combinational circuit shown in figure.