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Network Analysis
Sinusoidal Steady State Analysis

Practice questions from Sinusoidal Steady State Analysis.

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Q#1 Sinusoidal Steady State Analysis GATE EE 2025 (Set 1) NAT +2 marks -0 marks

In an experiment to measure the active power drawn by a single-phase RL Load connected to an AC source through a  resistor, three voltmeters are connected as shown in the figure below. The voltmeter readings are as follows: . Assuming perfect resistors and ideal voltmeters, the Load-active power measured in this experiment, in W, is __________ (round off to one decimal place).

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Q#2 Sinusoidal Steady State Analysis GATE EE 2023 (Set 1) NAT +2 marks -0 marks

For the circuit shown, if , the instantaneous value of the Thevenin's equivalent voltage (in Volts) across the terminals  at time  is __________ (Round off to 2 decimal places).

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Q#3 Sinusoidal Steady State Analysis GATE EE 2023 (Set 1) NAT +2 marks -0 marks

The circuit shown in the figure is initially in the steady state with the switch  in open condition and  in closed condition. The switch  is closed and  is opened simultaneously at the instant , where . The minimum value of  in milliseconds, such that there is no transient in the voltage across the  capacitor, is (Round off to 2 decimal places).

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Q#4 Sinusoidal Steady State Analysis GATE EE 2022 (Set 1) NAT +1 mark -0 marks

An inductor having a 𝑄-factor of 60 is connected in series with a capacitor having a 𝑄-factor of 240. The overall 𝑄-factor of the circuit is ________. (round off to nearest integer)

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Q#5 Sinusoidal Steady State Analysis GATE EE 2022 (Set 1) NAT +1 mark -0 marks

The network shown below has a resonant frequency of 150 kHz and a bandwidth of 600 Hz. The 𝑄-factor of the network is __________. (round off to nearest integer)

A picture containing diagram, sketch, line, design

Description automatically generated

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Q#6 Sinusoidal Steady State Analysis GATE EE 2021 (Set 1) NAT +1 mark -0 marks

In the given circuit, the value of capacitor C that makes current I = 0 is _________ μF.

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Q#7 Sinusoidal Steady State Analysis GATE EE 2021 (Set 1) NAT +2 marks -0 marks

In the given circuit, for maximum power to be delivered to , its value should be …………… Ω. (Round off to 2 decimal places).        

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Q#8 Sinusoidal Steady State Analysis GATE EE 2020 (Set 1) NAT +1 mark -0 marks

Current through ammeters  and  in fig. are 1  10° and 1  70° respectively. The reading of the ammeter A1 (rounded off to 3 decimal places) is _________ A.

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Q#9 Sinusoidal Steady State Analysis GATE EE 2019 (Set 1) NAT +2 marks -0 marks

The voltage across and the current through a load are expressed as follows        

The average power in watts (round off to one decimal place) consumed by the load is _______.

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Q#10 Sinusoidal Steady State Analysis GATE EE 2018 (Set 1) MCQ +1 mark -0.33 marks

In the figure, the voltages are  ,  and

. The circuit is in sinusoidal steady state, and,   and   are the average power outputs. Which one of the following statements is true?

Untitled-9.png

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Q#11 Sinusoidal Steady State Analysis GATE EE 2018 (Set 1) NAT +2 marks -0 marks

The voltage v(t) across the terminals a and b as shown in the figure, is a sinusoidal voltage having a frequency . When the inductor current i(t) is in phase with the voltage v(t), the magnitude of the impedance Z (in ) seen between the terminals a and is _______ (up to 2 decimal places).

Untitled-11.png

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Q#12 Sinusoidal Steady State Analysis GATE EE 2018 (Set 1) NAT +2 marks -0 marks

The voltage across the circuit in the figure, and the current through it are given by the following expressions:

Where , If the average power delivered to the circuit is zero then the value of X (in Ampere) is ________ (up to 2 decimal places).

Untitled-26.png

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Q#13 Sinusoidal Steady State Analysis GATE EE 2018 (Set 1) MCQ +2 marks -0.66 marks

The equivalent impedance for the infinite ladder circuit shown in the figure is

Untitled-30.png

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Q#14 Sinusoidal Steady State Analysis GATE EE 2017 (Set 1) MCQ +2 marks -0.66 marks

A source is supplying a load through a 2-phase, 3-wire transmission system as shown in figure below. The instantaneous voltage and current in phase-a are  V and A, respectively. Similarly for phase-b, the instantaneous voltage and current are A, respectively.         

Z:\PY\EE\Redreaw figure\Network\updated\74-66.jpg

The total instantaneous power flowing from the source to the load is

2200 W

4400 W

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Q#15 Sinusoidal Steady State Analysis GATE EE 2016 (Set 1) NAT +2 marks -0 marks

In the circuit shown below, the supply voltage is  volts. The peak value of the steady state current through the  resistor, in amperes, is _________________.  

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2016\EE_GATE_2016_SET_1\EE_GATE_2016_SET_1 image\22.jpg

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Q#16 Sinusoidal Steady State Analysis GATE EE 2016 (Set 1) NAT +2 marks -0 marks

The circuit below is excited by a sinusoidal source. The value of R, in , for which the admittance of the circuit becomes a pure conductance at all frequencies is _____________.

23.jpg

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Q#17 Sinusoidal Steady State Analysis GATE EE 2016 (Set 2) MSQ +1 mark -0.33 marks

A resistance and a coil connected in series and supplied from a phase, 100V, 50Hz ac source as shown in the figure below. The rms values of possible voltages across the resistance  and coil  respectively, in volts are

4.jpg`

65, 35

50, 50

60, 90

60, 80

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Q#18 Sinusoidal Steady State Analysis GATE EE 2016 (Set 2) NAT +1 mark -0 marks

The voltage (V) and current ((A) across a load are as follows.

.

.

The average power consumed by the load, in W, is_____________.

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Q#19 Sinusoidal Steady State Analysis GATE EE 2015 (Set 1) MCQ +1 mark -0.33 marks

An inductor is connected in parallel with a capacitor as shown in the figure.        

12.jpg

As the frequency of current i is increased, the impedance (Z) of the network varies as

13.jpg

14.jpg

16.jpg

15.jpg

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Q#20 Sinusoidal Steady State Analysis GATE EE 2015 (Set 1) NAT +2 marks -0 marks

The circuit shown in the figure has two sources connected in series. The instantaneous voltage of the AC source (in Volt) is given by . If the circuit is in steady state, then the RMS value of the current (in Ampere) flowing in the circuit is

27.jpg

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Q#21 Sinusoidal Steady State Analysis GATE EE 2015 (Set 2) MCQ +2 marks -0.66 marks

In the given network. , ,  

The phasor current i (in Ampere) is

33.jpg

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Q#22 Sinusoidal Steady State Analysis GATE EE 2015 (Set 2) NAT +2 marks -0 marks

A symmetrical square wave of 50% duty cycle has amplitude of ±15V and time period of . This square wave is applied across a series RLC circuit with  L=10mH and . The amplitude of the 5000 rad/s component of the capacitor voltage (in volt) is ____________.          

34.jpg

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Q#23 Sinusoidal Steady State Analysis GATE EE 2014 (Set 2) MCQ +2 marks -0.66 marks

The voltage across the capacitor, as shown in the figure, is expressed as +

10.jpg

The values of and  respectively, are

2.0 and 1.98

2.0 and 4.20

2.5 and 3.50

5.0 and 6.40

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Q#24 Sinusoidal Steady State Analysis GATE EE 2014 (Set 2) NAT +2 marks -0 marks

The total power dissipated in the circuit, shown in the figure, is 1kW. The voltmeter, across the load, reads 200V. The value of  is ____________

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2014\Gate-EE-2014_2\EE02_2014 images\11.jpg

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Q#25 Sinusoidal Steady State Analysis GATE EE 2014 (Set 3) MCQ +2 marks -0.66 marks

A series RLC circuit is observed at two frequencies. At , we note that source voltage   results in a current . At , the source voltage   results in a current . The closest values for R, L, C out of the following options are

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Q#26 Sinusoidal Steady State Analysis GATE EE 2013 (Set 1) MCQ +2 marks -0.66 marks

A single-phase load is supplied by a single –phase voltage source. If the current flowing from the Load to the source is  and if the voltage at the load terminals is , then the

Load absorbs real power and delivers reactive power.

Load absorbs real power and absorbs reactive power.

Load delivers real power and delivers reactive power.

Load delivers real power and absorbs reactive power.

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Q#27 Sinusoidal Steady State Analysis GATE EE 2013 (Set 1) MCQ +2 marks -0.66 marks

In the circuit shown below, if the source voltage  then the Thevenin’s equivalent voltage in volts as seen by the load resistance  is

D:\Vol-2\Network Analysis\SSSA-53.jpg

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Q#28 Sinusoidal Steady State Analysis GATE EE 2013 (Set 1) MCQ +2 marks -0.66 marks

Two magnetically uncoupled inductive coils have Q factors  and  at the chosen operating frequency. Their respective resistances are  and . When connected in series, their effective Q factor at the same operating frequency is

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Q#29 Sinusoidal Steady State Analysis GATE EE 2012 (Set 1) MCQ +1 mark -0.33 marks

In the circuit shown below, the current through the inductor is         

0 A

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Q#30 Sinusoidal Steady State Analysis GATE EE 2012 (Set 1) MCQ +1 mark -0.33 marks

The average power delivered to an impedance (4–j3) by a current  is

44.2W

50W

62.5W

125W

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Q#31 Sinusoidal Steady State Analysis GATE EE 2012 (Set 1) MCQ +2 marks -0.66 marks

Assuming both the voltage sources are in phase, the value of R for which maximum power is transferred from circuit A to circuit B is

19.jpg

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Q#32 Sinusoidal Steady State Analysis GATE EE 2012 (Set 1) MCQ +2 marks -0.66 marks

23.jpg

In the circuit shown, the three voltmeter readings are .

The power factor of the load is

0.45

0.50

0.55

0.60

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Q#33 Sinusoidal Steady State Analysis GATE EE 2012 (Set 1) MCQ +2 marks -0.66 marks

23.jpg

In the circuit shown, the three voltmeter readings are .

If , the approximate power consumption in the load is         

700W

750W

800W

850W

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Q#34 Sinusoidal Steady State Analysis GATE EE 2011 (Set 1) MCQ +1 mark -0.33 marks

The RMS value of the current i(t) in the circuit shown below is

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2011\GATE-Electrical-Engineering-2011 images\1.jpg

1A

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Q#35 Sinusoidal Steady State Analysis GATE EE 2011 (Set 1) MCQ +1 mark -0.33 marks

The voltage applied to a circuit is   volts and the circuit draws a current of  amperes. Taking the voltage as the reference phasor, the phasor representation of the current in amperes is

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Q#36 Sinusoidal Steady State Analysis GATE EE 2011 (Set 1) MCQ +2 marks -0.66 marks

An RLC circuit with relevant data is given below.

The power dissipated in the resistor R is

0.5W

1W

2W

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Q#37 Sinusoidal Steady State Analysis GATE EE 2011 (Set 1) MCQ +2 marks -0.66 marks

An RLC circuit with relevant data is given below.

The current in the figure above is

–j 2A

+j2 A

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Q#38 Sinusoidal Steady State Analysis GATE EE 2009 (Set 1) MCQ +2 marks -0.66 marks

The equivalent capacitance of the input loop of the circuit shown is

Q24.jpg

2 µF

100 µF

200 µF

4 µF

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Q#39 Sinusoidal Steady State Analysis GATE EE 2008 (Set 1) MCQ +1 mark -0.33 marks

The Thevenin's equivalent of a circuit operating at, has  and . At this frequency, the minimal realization of the Thevenin's impedance will have a

Resistor and a capacitor and an inductor

Resistor and a capacitor

Resistor and an inductor

Capacitor and an inductor

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Q#40 Sinusoidal Steady State Analysis GATE EE 2008 (Set 1) MCQ +2 marks -0.66 marks

The resonant frequency for the given circuit will be

Q22.jpg

1 rad/s

2 rad/s

3 rad/s

4 rad/s

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Q#41 Sinusoidal Steady State Analysis GATE EE 2007 (Set 1) MCQ +2 marks -0.66 marks

The R-L-C series circuit shown is supplied from a variable frequency voltage source. The admittance-locus of the R-L-C network at terminals AB for increasing frequency ω is

Q62-1.jpg

Q62-2.jpg

Q62-3.jpg

Q62-5.jpg

Q62-4.jpg

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Q#42 Sinusoidal Steady State Analysis GATE EE 2007 (Set 1) MCQ +2 marks -0.66 marks

In the figure given below all phasors are with reference to the potential at point "O". The locus of voltage phasor   as R is varied from zero to infinity is shown by

Q63-1.jpg

Q63-2.jpg

Q63-3.jpg

Q63-4.jpg

Q63-5.jpg

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Q#43 Sinusoidal Steady State Analysis GATE EE 2006 (Set 1) MCQ +1 mark -0.33 marks

In the figure the current source is 10 A, R=1Ω, the impedances are , and .  The Thevenin equivalent looking into the circuit across X-Y is

Q3.jpg

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Q#44 Sinusoidal Steady State Analysis GATE EE 2006 (Set 1) MCQ +2 marks -0.66 marks

The circuit shown in the figure is energized by a sinusoidal voltage source  at a frequency which causes resonance with a current of I.

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2006\Figures\Q32-1.jpg

The phasor diagram which is applicable to this circuit is

Q32-2.jpg

Q32-3.jpg

Q32-4.jpg

Q32-5.jpg

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Q#45 Sinusoidal Steady State Analysis GATE EE 2005 (Set 1) MCQ +1 mark -0.33 marks

The RMS value of the voltage is:

5V

7V

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Q#46 Sinusoidal Steady State Analysis GATE EE 2005 (Set 1) MCQ +2 marks -0.66 marks

The RL circuit of Figure is fed from a constant magnitude, variable frequency sinusoidal voltage source . At 100 Hz, the R and L elements each have a voltage drop . If the frequency of the source is changed to 50 Hz, the new voltage drop across R is:

Q31.jpg

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Q#47 Sinusoidal Steady State Analysis GATE EE 2004 (Set 1) MCQ +1 mark -0.33 marks

In the figure the value of Z in Figure, which is most appropriate to cause parallel resonance at 500 Hz, is

Q1.jpg

125.00 mH

304.20 µF

2.0µF

0.05µF

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Q#48 Sinusoidal Steady State Analysis GATE EE 2004 (Set 1) MCQ +1 mark -0.33 marks

Total instantaneous power supplied by a 3-phase ac supply to a balanced R-L load is

Zero

Constant

Pulsating with zero average

Pulsating with non-zero average

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Q#49 Sinusoidal Steady State Analysis GATE EE 2004 (Set 1) MCQ +2 marks -0.66 marks

In figure, the admittance values of the elements in Siemens are

respectively.

The value of I as a phasor when the voltage E across the elements isis

1.5 + j0.5

5 – j18

0.5 + j1.8

5 – j12

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Q#50 Sinusoidal Steady State Analysis GATE EE 2003 (Set 1) MCQ +1 mark -0.33 marks

A segment of a circuit is shown in Figure.  , . The voltage  is given by

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2003\Figures\Q2.jpg

3 – 8 cos2t

32 sin2t

16 sin2t

16 cos2t

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Q#51 Sinusoidal Steady State Analysis GATE EE 2003 (Set 1) MCQ +1 mark -0.33 marks

In the Figure.

Untitled-2.png        .

The thevenin impedance seen from X-Y is

56.645°

6030°

7030°

34.465°

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Q#52 Sinusoidal Steady State Analysis GATE EE 2003 (Set 1) MCQ +2 marks -0.66 marks

In the circuit of Figure, the magnitudes of  and  are twice that of . The inductance of the coil is Q31.jpg        

2.14 mH

5.30 H

31.84 mH

1.32 H

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Q#53 Sinusoidal Steady State Analysis GATE EE 2002 (Set 1) MCQ +2 marks -0.66 marks

In the circuit shown in Figure, what value of C will cause a unity power factor at the ac source?

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2002\Figures\Q27.jpg

68.1 µF

165 µF

0.681 µF

6.81 µF

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Q#54 Sinusoidal Steady State Analysis GATE EE 2002 (Set 1) MCQ +2 marks -0.66 marks

A series R-L-C circuit has R = 50Ω, L = 100 μH and C = 1 μF. the lower half power frequency of the circuit is

30.55 kHz

3.055 kHz

51.92 kHz

1.92 kHz

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Q#55 Sinusoidal Steady State Analysis GATE EE 2002 (Set 1) MCQ +2 marks -0.66 marks

Consider the circuit shown in Figure. If the frequency of the source is 50 Hz, then a value of  which results in a transient free response is

Q37.jpg

0 ms

1.78 ms

2.71 ms

2.91 ms

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Q#56 Sinusoidal Steady State Analysis GATE EE 2002 (Set 1) NAT +2 marks -0 marks

An electrical network is fed by two ac sources, as shown Figure. Given that ,  and .  Obtain the Thevenin equivalent circuit (Thevenin voltage and impedance) across terminals x and y, and determine the current  through the load .

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2002\Figures\Q53.jpg

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Q#57 Sinusoidal Steady State Analysis GATE EE 2001 (Set 1) MCQ +1 mark -0.33 marks

In a series RLC circuit at resonance, the magnitude of the voltage developed across the capacitor.

Is always zero

Can never be greater than the input voltage

Can be greater than the input voltage, however, it is 90° out of phase with the input voltage.

Can be greater than the input voltage, and is in phase with the input voltage.

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Q#58 Sinusoidal Steady State Analysis GATE EE 2001 (Set 1) MCQ +2 marks -0.66 marks

A 240 V single-phase ac source is connected to a load with an impedance of .  A capacitor is connected in parallel with the load.  If the capacitor supplied 1250 VAR, the real power supplied by the source is

3600 W

2880 W

2400 W

1200 W

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Q#59 Sinusoidal Steady State Analysis GATE EE 2001 (Set 1) MCQ +2 marks -0.66 marks

Determine the resonance frequency and the Q-factor of the circuit shown in figure.

Data: R = 10Ω, C = 3µF, ,  and M = 10 mH.

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2001\Figures\Q51.jpg

f=430.52Hz and Q=10

f=530.52Hz and Q=5

f=530.52Hz and Q=10

f=530.52Hz and Q=20

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Q#60 Sinusoidal Steady State Analysis GATE EE 2000 (Set 1) MCQ +2 marks -0.66 marks

The impedance seen by the source in the circuit in figure, is given by

D:\Vol-2\SSSA-19.jpg

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Q#61 Sinusoidal Steady State Analysis GATE EE 2000 (Set 1) NAT +2 marks -0 marks

Predict the current I in figure in response to a voltage of  . The impedance values are given in ohms. Use the thevenin’s theorem.

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Solutions\network\Network 91-01\Network Images\74.jpg

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Q#62 Sinusoidal Steady State Analysis GATE EE 1999 (Set 1) MCQ +1 mark -0.33 marks

The current in the circuit shown in figure is:

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-1999\images\Q1_1.12.jpg

5A

10A

15A

25A

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Q#63 Sinusoidal Steady State Analysis GATE EE 1999 (Set 1) MCQ +2 marks -0.66 marks

A fixed capacitor of reactance –j0.02 kΩ is connected in parallel across a series combination of a fixed inductor of reactance j0.01 kΩ and a variable resistance R. As R is varied from zero to infinity, the locus diagram of the admittance of this L-C-R circuit will be

A semi-circle of diameter j 100 and center at zero

A semi-circle of diameter j 50 and center at zero

A straight line inclined at an angle

A straight line parallel to the x-axis

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Q#64 Sinusoidal Steady State Analysis GATE EE 1999 (Set 1) MCQ +2 marks -0.66 marks

The voltage phasor of a circuit is  and the current phasor is A. The active and the reactive powers in the circuit are:

10W and 17.32 VAr

5W and 8.66 VAr

20W and 60 VAr

and

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Q#65 Sinusoidal Steady State Analysis GATE EE 1998 (Set 1) MCQ +1 mark -0.33 marks

A sinusoidal source of voltage V and frequency f is connected to a series circuit of variable resistance, R and a fixed reactance, X. the locus of the tip of the current-phasor I, as R is varied from 0 to ∞ is:

A semicircle with a diameter of

A straight line with a slop of

An ellipse with  as major axis

A circle of radius   and origin at  

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Q#66 Sinusoidal Steady State Analysis GATE EE 1998 (Set 1) MCQ +1 mark -0.33 marks

A circuit with a resistor, inductor and capacitor in series is resonant of  If all the component values are now doubled, the new resonant frequency is:

still

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Q#67 Sinusoidal Steady State Analysis GATE EE 1998 (Set 1) MCQ +1 mark -0.33 marks

A series R-L-C circuit when excited by a 10V sinusoidal voltage source of variable frequency, exhibits resonance at 100Hz and has a 3 dB bandwidth of 5Hz. The voltage across the inductor L at resonance is:

10V

200V

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Q#68 Sinusoidal Steady State Analysis GATE EE 1996 (Set 1) MCQ +1 mark -0.33 marks

A water boiler at home is switched on the a.c. mains supplying power at 230V/50Hz. The frequency of instantaneous power consumed by the boiler is

0 Hz

50 Hz

100 Hz

150 Hz

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Q#69 Sinusoidal Steady State Analysis GATE EE 1996 (Set 1) MCQ +2 marks -0.66 marks

A coil (which can be modeled as a series RL circuit) has been designed for high-Q performance at a rated voltage and a specified frequency. If the frequency of operation is doubled, and the coil is operated at the same rated voltage, then the Q-factor and the active power P consumed by the coil will be affected as follows

P is doubled, Q is halved

P is halved, Q is doubled

P remains constant, Q is doubled

P is decreased 4 times, Q is doubled

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Q#70 Sinusoidal Steady State Analysis GATE EE 1995 (Set 1) NAT +1 mark -0 marks

A series R-L-C circuit has the following parameter values: , , .The Q factor of the circuit at resonance is __________

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Q#71 Sinusoidal Steady State Analysis GATE EE 1995 (Set 1) MCQ +2 marks -0.66 marks

In the network system shown in figure, find the current through  using nodal method. The values of voltages are given in volts and the impedances are given in ohms.

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-1995\images\Q10.jpg

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Q#72 Sinusoidal Steady State Analysis GATE EE 1994 (Set 1) MCQ +1 mark -0.33 marks

At resonance, the given parallel circuit constituted by an iron-coil and a capacitor behaves like

Z:\PY\EE\Redreaw figure\Network\updated\67-05.jpg

An open-circuit

A short-circuit

A pure resistor of value R

A pure resistor of value much higher than R

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Q#73 Sinusoidal Steady State Analysis GATE EE 1994 (Set 1) NAT +1 mark -0 marks

In the given circuit, the voltage , has a phase angle of _____________ with respect to .

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Q#74 Sinusoidal Steady State Analysis GATE EE 1993 (Set 1) MCQ +1 mark -0.33 marks

The following circuit (figure) resonates at

D:\1Mayu\Gate-9\JPG\JPG\1\1993\Q_6_2.JPG

all frequencies

0.5 rad/sec

5 rad/sec

1 rad/sec

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Q#75 Sinusoidal Steady State Analysis GATE EE 1992 (Set 1) MCQ +2 marks -0.66 marks

Currents , and   meet at a junction (node) in a circuit. All currents are marked as entering the node.

If  and , then  will be

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Q#76 Sinusoidal Steady State Analysis GATE EE 1992 (Set 1) MCQ +2 marks -0.66 marks

A constant voltage frequency sinusoidal voltage source of magnitude  is connected to a series circuit made of a resistance of 15Ω, a coil of winding resistance R and inductance L and a 50μF capacitor. The voltage across the 15Ω resistors is 30V, across the coil is 50V, across the capacitor is 40V, The voltage across the combination of the 15Ω resistor and the coil together is 72.11V. Determine the values of the inductance L, winding resistance R and the source voltage V.

L=0.01H, R=15Ω  and V=60V

L=0.02H, R=30Ω  and V=60V

L=0.02H, R=15Ω  and V=30V

L=0.02H, R=15Ω  and V=60V

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Q#77 Sinusoidal Steady State Analysis GATE EE 1991 (Set 1) MCQ +1 mark -0 marks

In the figure shown,  are ideal ammeters. If  read 5 and 13A respectively, reading of  will be

Z:\PY\EE\Redreaw figure\Network\updated\67-01.jpg

8A

12A

18A

Indeterminate unless the actual values of R, C and  are specified

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Q#78 Sinusoidal Steady State Analysis GATE EE 1991 (Set 1) MCQ +2 marks -0.66 marks

A one port active network has an input admittance Y, the magnitude of which is shown in figure as a function of frequency. The circuit is resistive or capacitive in different frequency ranges.

Complete the following table:

Frequency Range

Type of Impedance

Value (Ω/H/F)

10000 rad/sec < ω

A

P

10 rad/sec < ω < 1000 rad/sec

B

Q

D:\Vol-2\SSSA-03.jpg

A= Capacitive, P=C=10μF and B=Inductive  Q=L=0.01H

A= Capacitive, P=C=100μF and B=Inductive  Q=L=0.1H

A=Inductive  P=L=0.01H and B=Capacitive  Q=C=100μF

A= Capacitive, P=C=100μF and B=Inductive  Q=L=0.01H

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Q#79 Sinusoidal Steady State Analysis GATE EE 1991 (Set 1) MCQ +2 marks -0.66 marks

In figure calculate

Z:\PY\EE\Redreaw figure\Network\updated\67-03.jpg

(a) The power delivered by each source

(b) The power dissipated in each resistor

(a) -j4.33, 7.5 +j4.33 (b) 4.5, 3

(a) -4.33, 7.5 +j4.33 (b) 4.5, 5

(a) -j4.33, 7.5 +j4.33 (b) 5.5, 3.5

(a) -j4.33, 8.5 +j4.33 (b) 5.5, 3

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