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Q#1
Sinusoidal Steady State Analysis
GATE EE 2007
MCQ
+2 marks
-0.66 marks
The R-L-C series circuit shown is supplied from a variable frequency voltage source. The admittance-locus of the R-L-C network at terminals AB for increasing frequency ω is
Explanation:
Admittance of the circuit 
At 
Real part of admittance 
Real part will always be positive
At 
[Maximum value]
Imaginary part of admittance 
At 
For 
For 
So the locus of admittance looks like as shown above.
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