Login to track your progress, bookmark questions, and view history.
Practice over 1000+ GATE-level questions from this topic!
Designed to match the latest GATE pattern with topic-wise precision, difficulty tagging, and detailed solutions.
Q#1
Sinusoidal Steady State Analysis
GATE EE 2001
MCQ
+1 mark
-0.33 marks
In a series RLC circuit at resonance, the magnitude of the voltage developed across the capacitor.
Is always zero
Can never be greater than the input voltage
Can be greater than the input voltage, however, it is 90° out of phase with the input voltage.
Can be greater than the input voltage, and is in phase with the input voltage.
Explanation:
Current in series RLC circuit is,


Under Resonance Condition, 
(in phase with voltage source)
Voltage across capacitor 

if
; then
= so
can be greater than voltage source and
is
phase behind the source voltage.
Login to keep track of your progress with the tool with daily goals, questions preparation and more.
Browse Practice Questions by Chapters / Topics in Browse Practice Questions by Chapters / Topics in GATE Electrical Engineering
Total Questions
Attempted
% Attempted
Correct
% Correct
Login to keep track of your progress with the tool with daily goals, questions preparation and more.
Login to track your progress, bookmark questions, and view history.