Digital Electronics
Boolean Algebra
Practice questions from Boolean Algebra.
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IncorrectA 3-input majority logic gate has inputs , and . The output F of the gate is logic '' if two or more of the inputs are logic ''. The output is logic ' ' if two or more of the inputs are logic '0'.
Which one of the following options is a Boolean expression of the output F ?
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Sign in to UnlockFor the Boolean function
the essential prime implicants are________
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Sign in to UnlockSelect the Boolean function(s) equivalent to , where , and are Boolean variables, and + denotes logical OR operation.
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Sign in to UnlockConsider a Boolean gate where the output is related to the inputs and as, , where + denotes logical OR operation. The Boolean inputs ' 0 ' and ' 1 ' are also available separately. Using instances of only gates and inputs ' 0 ' and ' 1 ', (select the correct options)
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Sign in to UnlockA function defined by three Boolean variables A, B and C when expressed as sum of products is given by
Whereandare the complements of the respective variables. The product of sums (PUS) form of the function F is
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Sign in to UnlockThe logic gates shown in the digital circuit below use strong pull-down NMOS transistors for LOW logic level at the outputs. When the pull-downs are off, high-value resistors set the output logic levels to HIGH (i.e. the pull-ups are weak). Note that some nodes are intentionally shorted to implement -wired logic". Such shorted nodes will be HIGH only if the outputs of all the gates whose outputs are shorted are HIGH.
The number of distinct values of (out of the 16 possible values) that give Y =1 is _______
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Sign in to UnlockWhich one of the following gives the simplified sum of products expression for the Boolean function are minterms corresponding to the inputs A, B and C with A as the MSB and C as the LSB?
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Sign in to UnlockThe output of the combinational circuit given below is
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Sign in to UnlockThe minimum number of 2-input NAND gates required to implement a 2-input XOR gate is
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Sign in to UnlockFollowing is the K-map of a Boolean function of five variables P, Q, R, S and X. The minimum sum-of-product (SOP) expression for the function is
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Sign in to UnlockThe Boolean expression converted into the canonical product of sum (POS) form is
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Sign in to UnlockAll the logic gates shown in the figure have a propagation delay of 20 ns. Let A = C = 0 and B = 1 until time t = 0. At t = 0, all the inputs flip (i.e., A = C = 1 and B = 0) and remain in that state. For t > 0, output Z = 1 for a duration (in ns) of ______________.
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Sign in to UnlockA 3-input majority gate is defined by the logic function. Which one of the following gates is represented by the function?
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Sign in to UnlockIn the figure shown, the output Y is required to be. The gates G1 and G2 must be, respectively,
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Sign in to UnlockA function of Boolean variables X, Y and Z is expressed in terms of the min-terms as
Which one of the product of sums given below is equal to the function F(X, Y, Z)?
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Sign in to UnlockThe Boolean expression simplifies to
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Sign in to UnlockThe output F in the digital logic circuit shown in the figure is
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Sign in to UnlockConsider the Boolean function, . Which one of the following is the complete set of essential prime implicants?
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Sign in to UnlockFor an n-variable Boolean function, the maximum number of prime implicants is
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Sign in to UnlockIn the circuit shown in the figure, if C=0, the expression for Y is
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Sign in to UnlockA universal logic gate can implement any Boolean function by connecting sufficient number of them appropriately. Three gates are shown.
Which one of the following statements is TRUE?
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Sign in to UnlockA bulb in a staircase has two switches, one switch being at the ground floor and the other one at the first floor. The bulb can be turned ON and also can be turned OFF by any one of the switches irrespective of the state of the other switch. The logic of switching of the bulb resembles
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Sign in to UnlockIn the sum of products function f(X,Y,Z) = the prime implicant’s are
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Sign in to UnlockThe output Y in the circuit below is always “1” when
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Sign in to UnlockMatch the logic gates in Column A with their equivalents in Column B.
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Sign in to UnlockFor the output F to be 1 in the logic circuit shown, the input combination should be
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Sign in to UnlockIf X =1 in the logic equation , then
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Sign in to UnlockWhat are the minimum number of 2-to-1 multiplexers required to generate a 2-input AND gate and a 2-input Ex-OR gate?
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Sign in to UnlockTwo products are sold from a vending machine, which has two push buttons and . When a button is pressed, the price of the corresponding product is displayed in a 7-segment display.
If no buttons are pressed, ‘0’ is displayed, signifying ‘Rs. 0’.
If only is pressed, ‘2’ is displayed, signifying ‘Rs. 2’.
If only is pressed, ‘5’ is displayed, signifying ‘Rs. 5’.
If both and are pressed, ‘E’ is displayed, signifying ‘Error’.
The names of the segments in the 7-segment display, and the glow of the display for ‘0’, ‘2’, ‘5’ and ‘E’, are shown below.
Consider
(i) Push button pressed /not pressed is equivalent to logic 1/0 respectively,
(ii) A segment glowing / not glowing in the display is equivalent to logic 1/0 respectively
If the segments a to g are considered as functions of and , then which of the following is correct?
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Sign in to UnlockTwo products are sold from a vending machine, which has two push buttons and . When a button is pressed, the price of the corresponding product is displayed in a 7-segment display.
If no buttons are pressed, ‘0’ is displayed, signifying ‘Rs. 0’.
If only is pressed, ‘2’ is displayed, signifying ‘Rs. 2’.
If only is pressed, ‘5’ is displayed, signifying ‘Rs. 5’.
If both and are pressed, ‘E’ is displayed, signifying ‘Error’.
The names of the segments in the 7-segment display, and the glow of the display for ‘0’, ‘2’, ‘5’ and ‘E’, are shown below.
Consider
(i) Push button pressed /not pressed is equivalent to logic 1/0 respectively,
(ii) A segment glowing / not glowing in the display is equivalent to logic 1/0 respectively
What are the minimum numbers of NOT gates and 2-input OR gates required to design the logic of the driver for this 7-segment display?
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Sign in to UnlockWhich of the following Boolean Expressions correctly represents the relation between P, Q, R and ?
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Sign in to UnlockThe Boolean function Y = AB+CD is to be realized using only 2-input NAND gates. The minimum number of gates required is
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Sign in to UnlockThe Boolean expression can be minimized to
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Sign in to UnlockThe number of product terms in the minimized sum-of-product expression obtained through the following K-map is (where “d” denotes don’t care states)
1 | 0 | 0 | 1 |
0 | d | 0 | 0 |
0 | 0 | d | 1 |
1 | 0 | 0 | 1 |
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Sign in to UnlockThe point P in the following figure is stuck at-1. The output f will be
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Sign in to UnlockThe Boolean expression for the truth table shown is:
A | B | C | F |
0 | 0 | 0 | 0 |
0 | 0 | 1 | 0 |
0 | 1 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 0 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
1 | 1 | 1 | 0 |
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Sign in to UnlockThe Boolean expression is equivalent to
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Sign in to UnlockA Boolean function f of two variables x and y is defined as follows:
;
Assuming complements of x and y are not available, a minimum cost solution for realizing f using only
2-input NOR gates and 2-input OR gates (each having unit cost) would have a total cost of
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Sign in to UnlockThe number of distinct Boolean expression of 4 variables is
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Sign in to UnlockIf the functions W, X, Y and Z are as follows
Then
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Sign in to UnlockThe circuit shown in figure converts
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Sign in to UnlockIf the input to the digital circuit (Figure) consisting of a cascade of 20 XOR-gates in X, then the output Y is equal to
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Sign in to Unlockhe gates and in figure have propagation delays of 10nsec 20nsec respectively. If the input makes an abrupt change from logic 0 to 1 at time
then the output waveform is
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Sign in to UnlockFor the digital block shown in Figure , the output where is MSB and is LSB. Y is given in terms of minterms as and its complement is
(a) Enter the logical values in the given karnaugh map [Figure] for the output Y.
(b) Write down the expression for Y in sum-of products from using minimum number of terms
(c) Draw the circuit for the digital logic boxes using four 2-input NAND gates only for each of the boxes.
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Sign in to UnlockFor the logic circuit shown in Figure, the required input condition (A, B, C) to make the output (X)=1 is
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Sign in to UnlockFor the logic circuit shown in figure, the simplified Boolean expression for the output Y is
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Sign in to UnlockThe operating conditions (ON = 1, OFF = 0) of three pumps (x, y, z) are to be monitored. implies that pump X is on. It is required that the indicator (LED) on the panel should glow when a majority of the pumps fail.
(a) Enter the logical values in the K-map in the format shown in figure. Derive the minimal Boolean sum of products expression whose output is zero when a majority of the pumps fail.
(b) The above expression is implemented using logic gates, and point P is the output of this circuit, as shown in figure. P is at 0 V when a majority of the pumps fails and is at 5 V otherwise. Design a circuit to drive the LED using this output. The current through the LED should be 10mA and the voltage drop across it is 1V. Assume that P can source or sink 10mA and a 5V supply is available.
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Sign in to UnlockThe logical expression is equivalent to
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Sign in to UnlockThe minimized form of the logical expression is
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Sign in to UnlockIn a certain application, four inputs A, B, C, D (both true and complement forms available) are fed to logic circuit, producing an output F, which operates a relay. The relay turns on when for the following states of the input and . States ‘1000’ and ‘1001’ do not occur, and for the remaining states, the relay is off. Minimize F with the help of a Karnaugh map and Find the minimum number of 3 – input NAND gates required to realize this.
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Sign in to UnlockThe minimum number of 2-input NAND gates required to implements the Boolean function, assuming that A, B and C are available, is
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Sign in to UnlockTwo 2’s complement number having sign bits x and y are added and the sign bit of the result is z. Then, the occurrence of overflow is indicated by the Boolean function
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Sign in to UnlockFor the identify , the dual form is
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Sign in to UnlockThe K-map for a Boolean function is shown in Fig. 2.13. The number of essential prime implicants for this function is
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Sign in to UnlockThe output of the logic gate in the figure is
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Sign in to UnlockThe Boolean function is a reduced form of
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Sign in to UnlockThe output of the circuit in the figure is equal to
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Sign in to UnlockThe minimum number of NAND gates required to implement the Boolean function, is equal to
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Sign in to UnlockThe output of a logic gate is ‘1’ when all its inputs are at logic ‘0’. Then gate is either
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Sign in to UnlockFor the logic circuit shown in figure, the output Y is equal to
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Sign in to UnlockThe truth table for the output Y in terms of three inputs A, B and C are given in table. Draw a logic circuit realization using only NOR gates.
A | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
B | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 1 |
C | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
Y | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 |
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Sign in to UnlockBoolean expression for the output of XNOR (Equivalent) logic gate with inputs A and B is:
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Sign in to UnlockThe four variable function f is given in terms of min-terms as: .
Using the k-map minimize the function in the sum of products form.
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