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Q#1
Data Converters
GATE EC 2023
NAT
+2 marks
-0 marks
A sample and hold circuit is implemented using a resistive switch and a capacitor with a time constant of 
. The time for sampling switch to stay closed to charge a capacitor adequately to full scale voltage of 
with 12-bit accuracy is ________ 
.
(rounded off to two decimal places)
Explanation:
Given: Time constant 
of 
sec.
Full scale voltage 
Steady state voltage of circuit is given by 
…(i)
To calculate the voltage to stay closed to charge capacitor adequately to a full scale voltage with 12 -bit accuracy is given by
…(ii)
Comparing equations (i) and (ii), we get,
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