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Q#1
Combinational Circuits
GATE EC 1991
NAT
+1 mark
-0 marks
A sequential multiplexer is connected as shown in figure. Each time the multiplexer receives the clock, it switches to the next channel (From 6 it goes to 1). If the input signals are
A = 
B = 
C = 
D = 
The minimum clock frequency should be _______ KHz.
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