Practice over 1000+ GATE-level questions from this topic!
Designed to match the latest GATE pattern with topic-wise precision, difficulty tagging, and detailed solutions.
It is required to design a binary mod-5 synchronous counter using AB flip-flops such that the output
changes as
….. and so on. The excitation table for the AB flip-flops is given in table 11.
(a) Write down the state table for the mod-5 counter.
(b) Obtain simplified SOP expressions for the inputs
,
,
,
,
and
in terms of
and their complements
(c) Hence, complete the circuit diagram for the mod-5 counter given in figure below using minimum number of 2-input NAND-gate only.

state table for the mod-5 counter







Explanation Locked!
Unlock this branch to view the explanation, track, bookmark and more.
Sign in to Unlock