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Q#1
Combinational Circuits
GATE EC 1997
MCQ
+1 mark
-0.33 marks
The decoding circuit shown in the figure is has been used to generate the active low chip select signal for a microprocessor peripheral. (The address line are designated as AO to A7 for I/O addresses)
The peripheral will correspond to I/O addresses in the range
60 H to 63 H
A4 to A7 H
30 H to 33 H
70 H to 73 H
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