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The figure is shows the block diagram of phase-locked-loop (PLL) in the locked condition.
The output voltage of the phase detector is given by
,
Where 
= phase of the input signal, and
= the phase of the output voltage Controlled Oscillator (VCO).
The value of 
is 1 volt/radian,
The frequency deviation of the VCO output is,
Where 
= input voltage of the VCO, and
= 159.15 Hz/volt
The amplifier A is a buffer with a voltage gain of unity.
(a) Derive the transfer function
.
(b) Let the loop to be locked for time 
and 
radian, where u(t) is the unit step function. Determine 
for
.
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