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Q#1
Sequential Circuits
GATE EE 2021
MCQ
+2 marks
-0.66 marks
A counter is constructed with three D flip-flops. The input-output pairs are named (D0, Q0), (D1, Q1), and (D2, Q2), where the subscript 0 denotes the least significant bit. The output sequence is desired to be the Gray-code sequence 000, 001, 011, 010, 110, 111, 101, and 100, repeating periodically. Note that the bits are listed in the Q2 Q1 Q0 format. The combinational logic expression for D1 is
Q2Q1Q0
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| Topic | Questions | Attempted | Correct | |
|---|---|---|---|---|
| Network Analysis | 268 | 0 | 0 | |
| Signals and Systems | 168 | 0 | 0 | |
| Control Systems | 262 | 0 | 0 | |
| Analog Electronics | 186 | 0 | 0 | |
| Digital Electronics | 150 | 0 | 0 | |
| Electrical Machines | 399 | 0 | 0 | |
| Power Electronics | 243 | 0 | 0 | |
| Power Systems | 350 | 0 | 0 | |
| EMFT EE | 111 | 0 | 0 | |
| Measurement | 160 | 0 | 0 | |
| Engineering Mathematics | 236 | 0 | 0 | |
| General Aptitude | 221 | 0 | 0 |
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