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Q#1
Sequential Circuits
GATE EE 2023
NAT
+2 marks
-0 marks
Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence 
of initial logic states, which will not change with clock, is
Explanation:
Assume initial state of circuit Q1 Q2 = 00
Characteristic equation of D-flip flop: Qn+1 = D
Q2(n+1) = C = Q1
For binary sequence [ABCD] to remain same, state of circuit must remain same
Q1 | Q2 | Q1(n+1) | Q2(n+1) |
0 | 0 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 1 |
1 | 1 | 0 | 1 |
∴ When Q1 Q2 = 00, next state is same as present state & hence binary sequence remains same.
C = Q1 = 0
[ABCD] = [1000]
Decimal value = 8
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